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9.2 DTL AND TTL LOGIC CIRCUITS 429

no load current flows through the output terminal. Thus in this case,DAandDBare conducting,
whereasD 1 ,D 2 , andT 1 are not. This is illustrated by the first line in Table 9.2.1.
For the inputs indicated on the other lines of Table 9.2.1 the reader can reason out the other
columns shown. In terms of the high and low ranges, the operation of the gate is illustrated in Table
9.2.2. The truth table is given in Table 9.2.3 using the positive logic in which high is indicated by
1 and low is indicated by 0. One can now see that the circuit does function as a NAND gate.

TABLE 9.2.1Inputs and Outputs for NAND Gate of Figure 9.2.1

Volts Conduction Volts

vA vB vX DA DB D 1 D 2 T 1 vF

0 0 0.7 YES YES NO 5
0 0.2 0.7 YES NO NO 5
0.3 4.6 1.0 YES NO NO 5
4.6 0.3 1.0 NO YES NO 5
4.8 4.1 2.1 NO NO YES 0.2 (=VCEsat)

TABLE 9.2.2Operation of NAND gate of Figure 9.2.1

vA vB vF

LOW LOW HIGH
LOW HIGH HIGH
HIGH LOW HIGH
HIGH HIGH LOW

TABLE 9.2.3Truth Table using positive logic

ABF

001

011

101

110

EXAMPLE 9.2.1

What logic function does the circuit of Figure 9.2.1 perform if negative logic is used?

Solution

Using negative logic, Table 9.2.2 can be translated into the following truth table. This can be seen
to be the logic function NOR.

ABF

110

100

010

001