9.4 LEARNING OBJECTIVES 437
Figure 9.3.6CMOS transmission gate.(a)Circuit.(b)Symbol.
As with ECL, the logic swing is small, thereby implying vulnerability to noise. While MOS can
be made compatible with TTL, IIL voltage ranges are incompatible with other families. The IIL
is used inside LSI blocks, with interfacing circuits provided at the inputs and outputs to make the
blocks externally compatible with TTL.
A particular choice of a logic technology involves a compromise of many practical charac-
teristics. Thepower-delay product(PDP) is the approximate energy consumed by a gate every
time its output is switched, and it forms a general figure of merit. PDP is the product ofPav, the
average dc power consumed by the gate, andTD, the gate’s propagation delay. It is the energy
required to effect a single change, sinceTDis the time required for a single change of logic state,
and is a measure of the electrical efficiency of the switch.
For TTL and ECL, PDP is on the order of 100 pJ; for NMOS it is around 10 pJ. Slower
versions of I^2 L can operate at 1 pJ per change. The average power consumption in CMOS is
linearly proportional to the data rate. CMOS, run at maximum speed, has comparable PDP to
that of NMOS. By reducing logic swing and/or device capacitance, the PDP can be reduced.
Improvements in PDP can also be achieved by making conventional circuits physically smaller
with consequent increased package density. Microfabrication technologies have gradually reduced
theminimum feature size, which refers to the typical minimum dimension used in an IC.
Improved performance is also achieved with substantially different kinds of technology,
such as cryogenicJosephon digital technology, which makes use of superconductors and can
offer 0.04-ns delay times and a PDP of about 2× 10 −^4 pJ.
9.4 Learning Objectives
Thelearning objectivesof this chapter are summarized here, so that the student can check whether
he or she has accomplished each of the following.
- BJT inverter switch, its characteristics, and its operation.
- Analysis of DTL and TTL logic circuits.
- MOSFET inverter and its characteristics.
