0195136047.pdf

PROBLEMS 439

Extremely low power consumption and high reliability become important criteria for all

pacemaker designs. While electrical engineers can come up with better circuit designs, mechanical

and chemical engineers have to select better materials to produce the case and the catheter, and

above all, the physicians have to provide the pacemaker specifications. Thus, doctors and engineers

have to work in teams in order to develop better biomedical products.

Problems

9.1.1Show that saturation will occur when Equation
(9.1.6) is satisfied.
*9.1.2Consider a BJT switch connected to the next stage,
as shown in Figure P9.1.2, in whichioutis likely
to be negative whenvoutis high. AssumeVCC= 5
V,RC=1k, and the high range to be 4 to 5 V.
Find the largest|iout|that can be tolerated.
9.1.3The transistor switch of Figure 9.1.2(a) is to be
designed to operate in saturation and in cutoff
when the pulse signal shown in Figure P9.1.3
is applied to the input. Assume an ideal transis-
tor withβ= 100 ,VT = 0 .7V,Vsat= 0 .2V,
andICEO= 0 .1 mA. Letting the supply voltage
VCC=5 V andRC= 500 , determine the min-
imum value ofRB, and sketch the output-voltage
waveform.
9.1.4For the BJT switch described in Figure 9.1.2(a),
letVCC=5V,VT = 0 .7V,Vsat= 0 .2 V, and
β=25. IfVlswitches between 0 and 5 V and
iB≤ 0 .1 mA, find the minimum values ofRBand
RCfor proper operation.
9.1.5Sketch the transfer characteristic for the BJT
switch described in Figure 9.1.2(a), given that
VCC=5V,Vsat= 0 .2V,VT = 0 .7V,RC=
500 ,RB=10 k, andβ=100.
9.1.6The transistor switch of Figure 9.1.2(a) withRB=
10 kandRC= 750 employs a BJT which

has the characteristics shown in Figure P9.1.6(a).

SketchVoas a function of time for the input signal

given in Figure P9.1.6(b).

9.2.1Considering Table 9.2.1, the first line has been

reasoned out in the text. Justify the other four lines.

*9.2.2WithvA=vB=0 in Figure 9.2.1, show that a

guessvX= 2 .1 V would lead to a contradiction,

and hence cannot be correct.

9.2.3Consider the circuit of Figure 9.2.1 withvA= 0. 4

V andvB= 0 .3 V. FindvXandvF.

9.2.4WithvA= 0 .2 V andvB= 4 .5 V in Figure 9.2.1,

justify whyvX= 0 .7 V will be an incorrect guess.

9.2.5Considering Figure 9.2.1 of the DTL NAND gate

circuit, inquire as to whyD 1 andD 2 are used in

the circuit. (Hint:Consider the third line of Table

9.2.1.)

9.2.6Consider the DTL gate circuit shown in Figure

P9.2.6. Assume diodes withVT= 0 .7 V and the

transistor to haveβ= 35 ,VT= 0 .7V,ICEO=0,

andVsat= 0 .2V.

(a) For inputsVA=5 V andVB=0 V, determine

Vo.

(b) For inputsVA=VB=0 V, determineVo.

(c) Is this a configuration of a DTL NOR gate?

RC

VCC

RB

VCC

Next

stage

vout

vin

iout

Figure P9.1.2

0105

t, μs

vi,V

5

15

Figure P9.1.3