26 PCWorld AUGUST 2019
REVIEWS RYZEN^3000
will just begin to
move to 10nm later
this year. We
suspect the chip
giant is a little
envious that AMD
reached this tiny
die shrink first.
With that
production
technology lead,
AMD breaks out a
redesigned
2nd-generation
“Zen” core for the Ryzen 3000 that promises
double the floating point performance over
the previous Ryzen 2000 series, as well as a
15-percent increase in “instructions per clock”
(think overall efficiency per clock).
On an even deeper level, AMD said it has
improved instruction pre-fetching, further
enhanced the instruction cache and doubled
the micro-op cache. Besides doubling the
floating point performance, AMD has now
adopted AVX-256 (256-bit Advanced Vector
Extensions; and yes, Intel fans, we know Core
has AVX-512). AVX’s impact is mostly seen in
video encoding today, but it can rear its
performance head elsewhere too.
AMD has essentially doubled the L3 cache
on the Ryzen 3000 chips, and the company is
going for some Apple-esque marketing by
calling it Game Cache. The cache, up to 70MB
on the Ryzen 9 3900X, goes a long way
toward reducing memory latency on the Ryzen
3000s. It also tends to boost gaming
performance dramatically on the CPU, so AMD
feels that calling it Game Cache can help the
average consumer understand its benefits. Yes,
that larger L3—err, Game Cache, will also help
application performance, but no one gets
excited about App Cache we guess.
Besides the cores, AMD has also
significantly rejiggered its chiplet design.
While the original Zen-based Ryzens featured
two 14nm CCDs along with their memory and
PCIe controller joined with Infinity Fabric, the
Zen 2–based Ryzen 3000s actually separate
the memory controller and PCIe 4.0
controller on separate IO dies. Unlike the 7nm
compute cores, the IO die is built on a 12nm
process. This helps lower the overall cost of
the CPU because it saves AMD’s fab partner,
TSMC, from using even more valuable 7nm
AMD said it has improved its floating point performance by 2X on its Ryzen
3000 series of CPUs.