eeworldonline.com | designworldonline.com 6 • 2019 DESIGN WORLD — EE NETWORK 37TESTING LVDS
To meet these requirements, the latest AWGs feature high-
resolution DACs and up to eight analog channels and 32 digital
channels in the same box. Multiple units can be synchronized for
even higher channel counts. Given the growth in application areas
for LVDS, the data signals involved are progressively becoming
more complex, just as the use-cases become more varied. The
availability of pattern generation software for AWGs simplifies
signal creation for a large number of channels. Using this software,
or by importing CSV or text files generated from an external tool,
designers can quickly and flexibly create the signals they need to
determine how well a device is working.LVDS BASICS
LVDS is a differential signaling system defined under ANSI/TIA/
EIA-644 that transmits information as the difference between
the voltages on a twisted pair of wires. The two wire voltages
are compared at the receiver. In a typical implementation, the
transmitter injects a constant current of 3.5 mA into the wires, with
the direction of current determining the digital logic level.
As long as there is tight electric- and magnetic-field
coupling between the two wires, LVDS reduces EMI output and
susceptibility, making it suitable for challenging automotive and
industrial applications. This noise reduction arises because of the
current flow in the two wires creating
equal and opposite electromagnetic
fields that tend to cancel each other.
The tightly coupled transmission
wires also reduce susceptibility to
electromagnetic noise interference
because the noise is common mode. An
LVDS receiver is unaffected by common-
mode noise because it senses the
differential voltage – changes in common
mode voltage doesn’t affect reception.
LVDS transmitters also consume a
constant current, placing less demand
on supply decoupling and reducing or
eliminating phenomena such as ground
bounce.
The low common-mode voltage of
about 1.2 V permits the use of LVDS
in a wide range of integrated circuits
with power supply voltages down to
2.5 V or lower. The low differential
voltage, about 350 mV, enables LVDS
to consume little power compared to
other signaling technologies. At a 2.5
V supply voltage, the power to drive
3.5 mA becomes 8.75 mW, compared
to the 90 mW dissipated by the load
resistor for an RS-422 signal.For a thorough evaluation of an LVDS
receiver, there are a number of jobs
that must take place before a design
can move into production. Here is a
rundown on what typically takes place
testing an LVDS receiver, such as a flat-
panel display system:Both analog and digital
channels are being used
to stimulate an LVDS
video display device.Tektronix — Test and Measurement HB 06-19.indd 37 6/7/19 1:50 PM