50 MAXIMUMPC MARCH 2004
addresses to another, and from locating
the correct row/column address of the
information needed from RAM.
And just as the librarian fetches
books for the reader, the processor uses
the memory controller (usually part of
the northbridge or memory controller
hub chip) to access memory locations.
Although the AMD Opteron, Athlon 64,
and 64 FX processors feature built-in
memory controllers, the principle is the
same.Adjusting RAM access
performance with CMOS/BIOS settings
You might not be able to control how
quickly the librarian gets you a book,
but you can adjust the speed of RAMaccess in two ways: by buying memory
with a faster speed rating (assuming
your motherboard supports faster RAM)
and by adjusting the memory timings in
the chipset setup menu found in most
CMOS/BIOS programs.
In the BIOS setup menu, RAM access
performance is indicated in clock cycles.
By default, the memory module’s serial
presence detect (SPD) chip provides the
motherboard with complete information
about the module, including the default
timing values the memory vendor deems
appropriate for the memory chips on the
module. Before you can tinker with mem-
ory timing, you need to disable the SPD
setting in the system BIOS’s chipset menu.
Figure 1 shows a typical chipset menu
using the default SPD setting, and Figure 2
shows the same menu with SPD disabled
to allow user-defined memory timings.
When RAM is addressed by the mem-
ory controller, each row is activated.
The memory addresses, represented by
a row/column value, are read from or
written to. The row is then deactivated,
and the next row is processed. Memorytimings control how quickly the memory
controller processes each row of mem-
ory. The faster the controller processes
the data in memory, the faster your PC
moves.
Table 1 (page 52) lists the memory
timing parameters in the order each
operation is performed during memory
access.
As you can see from Table 1, the CAS
Latency value (often the only memory
module value mentioned in catalog list-
ings, other than clock speed) is just one
small part of the memory timing picture.
Memory timing is sometimes listed as
2-3-3-7-1T. Figure 3 (page 53) indicates
what these values mean, using the ter-
minology described in Table 1.
Generally, the smallest value pos-
sible for each parameter in Table 1 (that
still allows the system to run without
crashes or instability) is recommended
for maximum speed. The tests performed
by Harry Lam at TechwareLabs.com
(www.techwarelabs.com/reviews/memory/
memory_timings/) are a good example of
how to compare the effects of different
combinations of timing values. In his
report you’ll get an idea of what kind of
return to expect from different settings.Understanding banks
of memory
When you add memory to a new moth-
erboard or upgrade an existing system,
the memory must be added in banks.
A memory bank refers to the amount
of memory, in bits, which matches the
data bus of the processor. SDRAM and
DDR DIMM memory modules, regard-
less of their size, are 64 bits wide, and
so is the data bus of Pentium 4, Athlon
XP, and Athlon 64 processors. Thus, you
can add a single DIMM module at a time
to expand the memory of systems using
these processors if the motherboard
uses a conventional single-channel
memory controller design.Single-bank or
dual-bank?
A single DIMM can add one bank or two
banks of memory to a system. Dual-bank
DIMM modules (these often have chips
on both sides and are also referred toRAM:
All Questions Answered!
Figure : )n order to tweak the speed settings of a RAM module, you must
first disable S0D serial presence detect in the ")/S, which prevents your
motherboard from automatically detecting the modules default timing settings. è