Custom PC - UK (2019-12)

SLCANDMLC

A conventionalmemorycellcanstore

a singlebitofinformation,asthe

floatinggateis eitherchargedor

discharged.Memorycellsofthistype

arecalledsingle-levelcells,orSLCs,

asthechargeis onlysettoonelevel.

However,bycarefullycontrolling

theexactlevelofchargeinthegate,

cellscanalsobeusedtostoremore

thanonebitofinformation.So,instead

ofthechargelevel(andsubsequent

thresholdvoltage)beingsettooneof

twolevels(fullorempty)it canalsobe

settofourlevels(empty,onethirdfull,

twothirdsfullorfull)oreveneight

levels.Thesecellsareknownasmulti-

levelcells(MLCs)whentwobitsof

informationarebeingstored,triple-

levelcells(TLC)forwhenthreebitsare

beingstoredorevenquad-levelcells

(QLC)forthelatestfour-bitcells.

Thebigadvantageofhaving

levelsinonecellis

thatyoucangreatlyincreasedata

density,asonecellcannowstore

two,fouroreveneighttimesthe

informationofa single-levelcell.However,

therearetwobigdisadvantages.

Thefirstis thattheperformanceofthe

celldropsasthenumberofchargelevels

increases.That’sbecausethecircuitryhasto

doa lotmorecarefulcheckingwhenreading

thechargelevelandchangingit. WithSLC,you

justdumpinthechargeandonlyneedcheckit

oncetoseeif it’sabovethethresholdvoltage.

However,withMLCorTLC,youhavetobefar

morecareful.Thissituationimpactsbothread

andwriteperformancebutit’sparticularlybad

forwriteperformance,withTLCcellsbeing6x

slowerforwriteoperationscomparedtoSLC,

forinstance.

Theotherbigproblemwithmulti-levelcells

is writeendurance.Aswe’veestablished,

continuallyerasingandreprogramminga cell

causesit tobreakdownandloseitsabilityto

SOURCE

LINE

BIT

WORDLINE LINE

CONTROLGATE

NNP

SOURCE

LINE

BIT

FLOAT LINE

GATE

WORDLINE

CONTROLGATE

NP

holdchargeovertime. This affects all types of

cell,whetherthecellis single- or multi-level.

However,becausemulti-level cells are

operatingonmuchtighter ranges of charge

level,it takesfarlesstime for the reduced

overallchargecapacity of the cell to corrupt

thedataretentionofthe cell.

So,whereasa single-level cell typically

hasa writeenduranceof 100,000 write

operations,MLCcellshave around 10,000

anda TLCjust3,000.Now, most cells can

operateinallthreemodes, so the NAND or

itscontrollercanpotentially downgrade a cell

fromTLCoperationtoMLC or SLC, as it wears

out,butthisdependson a number of factors,

suchaswhetherthere’s actually enough

roomonthedisktoreduce its volume.

Thisabilitytohavecells operate in

differentmodesis also exploited by SSD

manufacturerstogetthe best of both

worlds.It’snowcommonplace for SSDs to

dynamicallyassigna portion of the drive

tooperateinanSLCmode so that the SSD

canstillofferfastwrite speeds. There’s

generallya limitonthe size of this SLC

writecache,butit’soften large enough to

accommodatemostlarge file transfers –

they’retypicallyintheregion of 10-30GB.

Whenthewriteoperation has finished and

theSSDhasa breakinwriting duties, it can

movethenewdatatolonger-term TLC

storage,soit canretain its overall capacity.

However,forsituations where a drive is

constantlybeinghammered with new data,

thesewritecachesnever get a chance to

purgethemselves,exposing a drive’s inherent

MLCorTLCwritespeeds. That’s why the likes

ofserversorotherhigh-demand applications

should only ever use

SLC-based SSDs.

WHY NAND?

One of the more

often overlooked

aspects of the

terminology

surroundingSSDsis NAND. People who did

some GCSE-level electronics might recognise

it as a term for a logic gate, but how does that

relate to flash memory? Well, by connecting

multiple floating gate transistors together and

wiring them in a certain way, we can form a

string of memory cells (a word) that functions

in the same way as an extended NAND gate.

Assuch,therecanbeconsiderable
complicationwhena drive startstofillupand
youwanttowrite(andparticularlyoverwrite)
somenewdata.TheSSDcontrollermay
havetocopydatafromoneblockand
squeezeit intoanotherblock(orseveral
otherblocks),beforeerasingtheempty
blockandwritingthenewdatabacktothe
clearedblock.
Thisiswherethemuch-fabledTRIM
commandcomesin.Previously,whenan
SSDwastoldto
deletedata,it
wouldn’tactually
erasethedata
(becausedoingtoo
mucherasingwill
degradethe
memoryfaster)but
justmarkit asignorable.However,whenit
comes to moving the data around for write
operations, the SSD would still copy this data.
The TRIM command tells the SSD that it can
skip rewriting the ignorable data the next
time it performs a block erase, preventing
the steady build-up of deleted, but not
erased, pages on an SSD.

A regulartransistorcan’tretain
itsstateoncepowerislost

Floatinggatetransistorshaveanisolatedgate
thatstoresa chargepermanently

BY CAREFULLY CONTROLLING THE EXACT

LEVEL OF CHARGE IN THE GATE, CELLS CAN

ALSO BE USED TO STORE MORE THAN ONE

BIT OF INFORMATION

FEATURE/ ANALYSIS