1.14. CONDITIONAL JUMPS
mov eax, OFFSET $SG792 ; 'it is ten'
; jump to $LN4@f if equal
je SHORT $LN4@f
mov eax, OFFSET $SG793 ; 'it is not ten'
$LN4@f:
ret 0
_f ENDP
Newer compilers are more concise:
Listing 1.125: Optimizing MSVC 2012 x64$SG1355 DB 'it is ten', 00H
$SG1356 DB 'it is not ten', 00H
a$ = 8
f PROC
; load pointers to the both strings
lea rdx, OFFSET FLAT:$SG1355 ; 'it is ten'
lea rax, OFFSET FLAT:$SG1356 ; 'it is not ten'
; compare input value with 10
cmp ecx, 10
; if equal, copy value from RDX ("it is ten")
; if not, do nothing. pointer to the string "it is not ten" is still in RAX as for now.
cmove rax, rdx
ret 0
f ENDP
Optimizing GCC 4.8 for x86 also uses theCMOVccinstruction, while the non-optimizing GCC 4.8 uses
conditional jumps.
ARM
Optimizing Keil for ARM mode also uses the conditional instructionsADRcc:
Listing 1.126: Optimizing Keil 6/2013 (ARM mode)f PROC
; compare input value with 10
CMP r0,#0xa
; if comparison result is EQual, copy pointer to the "it is ten" string into R0
ADREQ r0,|L0.16| ; "it is ten"
; if comparison result is Not Equal, copy pointer to the "it is not ten" string into R0
ADRNE r0,|L0.28| ; "it is not ten"
BX lr
ENDP
|L0.16|
DCB "it is ten",0
|L0.28|
DCB "it is not ten",0
Without manual intervention, the two instructionsADREQandADRNEcannot be executed in the same run.
Optimizing Keil for Thumb mode needs to use conditional jump instructions, since there are no load in-
structions that support conditional flags:
Listing 1.127: Optimizing Keil 6/2013 (Thumb mode)f PROC
; compare input value with 10
CMP r0,#0xa
; jump to |L0.8| if EQual
BEQ |L0.8|
ADR r0,|L0.12| ; "it is not ten"
BX lr
|L0.8|
ADR r0,|L0.28| ; "it is ten"
BX lr
ENDP