Assembly Language for Beginners

1.15. SWITCH()/CASE/DEFAULT

lui $a0, ($LC0 >> 16) # "zero"

lw $t9, (puts & 0xFFFF)($gp)

or $at, $zero ; NOP

jr $t9

la $a0, ($LC0 & 0xFFFF) # "zero" ; branch delay slot

sub_80: # DATA XREF: .rodata:00000124
; print "one" and finish
lui $a0, ($LC1 >> 16) # "one"
lw $t9, (puts & 0xFFFF)($gp)
or $at, $zero ; NOP
jr $t9
la $a0, ($LC1 & 0xFFFF) # "one" ; branch delay slot

sub_94: # DATA XREF: .rodata:00000128
; print "two" and finish
lui $a0, ($LC2 >> 16) # "two"
lw $t9, (puts & 0xFFFF)($gp)
or $at, $zero ; NOP
jr $t9
la $a0, ($LC2 & 0xFFFF) # "two" ; branch delay slot

; may be placed in .rodata section:
off_120: .word sub_6C
.word sub_80
.word sub_94
.word sub_44
.word sub_58

The new instruction for us isSLTIU(“Set on Less Than Immediate Unsigned”).

This is the same asSLTU(“Set on Less Than Unsigned”), but “I” stands for “immediate”, i.e., a number
has to be specified in the instruction itself.

BNEZis “Branch if Not Equal to Zero”.

Code is very close to the otherISAs.SLL(“Shift Word Left Logical”) does multiplication by 4.

MIPS is a 32-bit CPU after all, so all addresses in thejumptableare 32-bit ones.

Conclusion

Rough skeleton ofswitch():

Listing 1.157: x86

MOV REG, input
CMP REG, 4 ; maximal number of cases
JA default
SHL REG, 2 ; find element in table. shift for 3 bits in x64.
MOV REG, jump_table[REG]
JMP REG

case1:
; do something
JMP exit
case2:
; do something
JMP exit
case3:
; do something
JMP exit
case4:
; do something
JMP exit
case5:
; do something
JMP exit

default: