1.28. 64-BIT VALUES IN 32-BIT ENVIRONMENT
GCC code is the same.
ARM
Listing 1.375: Optimizing Keil 6/2013 (ARM mode)f_add PROC
ADDS r0,r0,r2
ADC r1,r1,r3
BX lr
ENDP
f_sub PROC
SUBS r0,r0,r2
SBC r1,r1,r3
BX lr
ENDP
f_add_test PROC
PUSH {r4,lr}
LDR r2,|L0.68| ; 0x75939f79
LDR r3,|L0.72| ; 0x00001555
LDR r0,|L0.76| ; 0x73ce2ff2
LDR r1,|L0.80| ; 0x00000b3a
BL f_add
POP {r4,lr}
MOV r2,r0
MOV r3,r1
ADR r0,|L0.84| ; "%I64d\n"
B __2printf
ENDP
|L0.68|
DCD 0x75939f79
|L0.72|
DCD 0x00001555
|L0.76|
DCD 0x73ce2ff2
|L0.80|
DCD 0x00000b3a
|L0.84|
DCB "%I64d\n",0
The first 64-bit value is passed inR0andR1register pair, the second inR2andR3register pair. ARM
has theADCinstruction as well (which counts carry flag) andSBC(“subtract with carry”). Important thing:
when the low parts are added/subtracted,ADDSandSUBSinstructions with -S suffix are used. The -S suffix
stands for “set flags”, and flags (esp. carry flag) is what consequentADC/SBCinstructions definitely need.
Otherwise, instructions without the -S suffix would do the job (ADDandSUB).
MIPS
Listing 1.376: Optimizing GCC 4.4.5 (IDA)f_add:
; $a0 - high part of a
; $a1 - low part of a
; $a2 - high part of b
; $a3 - low part of b
addu $v1, $a3, $a1 ; sum up low parts
addu $a0, $a2, $a0 ; sum up high parts
; will carry generated while summing up low parts?
; if yes, set $v0 to 1
sltu $v0, $v1, $a3
jr $ra
; add 1 to high part of result if carry should be generated:
addu $v0, $a0 ; branch delay slot
; $v0 - high part of result