1.8. PRINTF() WITH SEVERAL ARGUMENTS
text:00002BCA 02 22 MOVS R2, #2
text:00002BCC 03 23 MOVS R3, #3
text:00002BCE CD F8 10 90 STR.W R9, [SP,#0x1C+var_C]
__text:00002BD2 01 F0 0A EA BLX _printf
text:00002BD6 05 B0 ADD SP, SP, #0x14
__text:00002BD8 80 BD POP {R7,PC}
The output is almost the same as in the previous example, with the exception that Thumb-instructions
are used instead.
ARM64
Non-optimizing GCC (Linaro) 4.9
Listing 1.53: Non-optimizing GCC (Linaro) 4.9.LC2:
.string "a=%d; b=%d; c=%d; d=%d; e=%d; f=%d; g=%d; h=%d\n"
f3:
; grab more space in stack:
sub sp, sp, #32
; save FP and LR in stack frame:
stp x29, x30, [sp,16]
; set stack frame (FP=SP):
add x29, sp, 16
adrp x0, .LC2 ; "a=%d; b=%d; c=%d; d=%d; e=%d; f=%d; g=%d; h=%d\n"
add x0, x0, :lo12:.LC2
mov w1, 8 ; 9th argument
str w1, [sp] ; store 9th argument in the stack
mov w1, 1
mov w2, 2
mov w3, 3
mov w4, 4
mov w5, 5
mov w6, 6
mov w7, 7
bl printf
sub sp, x29, #16
; restore FP and LR
ldp x29, x30, [sp,16]
add sp, sp, 32
ret
The first 8 arguments are passed in X- or W-registers: [Procedure Call Standard for the ARM 64-bit Archi-
tecture (AArch64), (2013)]^71. A string pointer requires a 64-bit register, so it’s passed inX0. All other
values have aint32-bit type, so they are stored in the 32-bit part of the registers (W-). The 9th argument
(8) is passed via the stack. Indeed: it’s not possible to pass large number of arguments through registers,
because the number of registers is limited.
Optimizing GCC (Linaro) 4.9 generates the same code.
1.8.3 MIPS.
3 arguments
Optimizing GCC 4.4.5
The main difference with the “Hello, world!” example is that in this caseprintf()is called instead of
puts()and 3 more arguments are passed through the registers $5...$7 (or $A0...$A2). That is why these
registers are prefixed with A-, which implies they are used for function arguments passing.
(^71) Also available ashttp://go.yurichev.com/17287