Article reSeArcH
0%100%1E-2^2 1E-3^38 1E-4 1E-5 1E-6 1E-7^7654 1E-pNMStarget: pNMSrequired pSpS(number of 9s)preferred
corner0%100%1E-21E-31E-41E-51E-61E-71E-8CNFET EDP
benefits retained2834567
pS(number of 9s)(a)
preferred
corner(b)Extended Data Fig. 7 | Effect of metallic CNTs on digital VLSI circuits.
a, Reduction in CNFET EDP benefits versus pS (metallic CNTs increase
IOFF, degrading EDP). pS ≈ 99.999%, sufficient to minimize EDP cost
due to metallic CNTs to ≤5%. b, pNMS versus pS (metallic CNTs degrade
SNM), (shown for SNMR = VDD/5, and for a circuit of one million logic
gates). Although 99.999% pS is sufficient to limit EDP degradation to ≤5%,
panel b shows that SNM imposes far stricter requirements on purity: pS ≈
99.999999% (that is, number of 9s is 8) to achieve pNMS ≥ 99% (number of
9s is 2). Results in panels a and b are simulated for VLSI circuit modules
from a 7-nm node processor core (see Supplementary Information and
Methods for additional details).