1.22. MANIPULATING SPECIFIC BIT(S)
; do OR:
ORR r0,r0,#0x80000000
BX lr
ENDP
negate PROC
; do XOR:
EOR r0,r0,#0x80000000
BX lr
ENDP
So far so good.
ARM has theBICinstruction, which explicitly clears specific bit(s). EORis the ARM instruction name for
XOR(“Exclusive OR”).
Optimizing Keil 6/2013 (Thumb mode)
Listing 1.286: Optimizing Keil 6/2013 (Thumb mode)my_abs PROC
LSLS r0,r0,#1
; r0=i<<1
LSRS r0,r0,#1
; r0=(i<<1)>>1
BX lr
ENDP
set_sign PROC
MOVS r1,#1
; r1=1
LSLS r1,r1,#31
; r1=1<<31=0x80000000
ORRS r0,r0,r1
; r0=r0 | 0x80000000
BX lr
ENDP
negate PROC
MOVS r1,#1
; r1=1
LSLS r1,r1,#31
; r1=1<<31=0x80000000
EORS r0,r0,r1
; r0=r0 ^ 0x80000000
BX lr
ENDP
Thumb mode in ARM offers 16-bit instructions and not much data can be encoded in them, so here a
MOVS/LSLSinstruction pair is used for forming the 0x80000000 constant. It works like this: 1 <<31 =
0 x 80000000.
The code ofmy_absis weird and it effectively works like this expression:(i<<1)>> 1. This statement looks
meaningless. But nevertheless, wheninput<< 1 is executed, theMSB(sign bit) is just dropped. When
the subsequentresult>> 1 statement is executed, all bits are now in their own places, butMSBis zero,
because all “new” bits appearing from the shift operations are always zeros. That is how theLSLS/LSRS
instruction pair clearsMSB.
Optimizing GCC 4.6.3 (Raspberry Pi, ARM mode)
Listing 1.287: Optimizing GCC 4.6.3 for Raspberry Pi (ARM mode)my_abs
; copy from S0 to R2:
FMRS R2, S0
; clear bit: