1.22. MANIPULATING SPECIFIC BIT(S)
bne .L2 ; yes
mov w0, w2 ; return rt
ret
The result is very similar to what GCC generates for x64:1.291 on page 331.
TheCSELinstruction is “Conditional SELect”. It just chooses one variable of two depending on the flags
set byTSTand copies the value intoW2, which holds the “rt” variable.
ARM64 + Non-optimizing GCC 4.9
And again, we’ll work on the 64-bit example which was already used:1.22.5 on page 330. The code is
more verbose, as usual.
Listing 1.296: Non-optimizing GCC (Linaro) 4.8
f:
sub sp, sp, #32
str x0, [sp,8] ; store "a" value to Register Save Area
str wzr, [sp,24] ; rt=0
str wzr, [sp,28] ; i=0
b .L2
.L4:
ldr w0, [sp,28]
mov x1, 1
lsl x0, x1, x0 ; X0 = X1<<X0 = 1<<i
mov x1, x0
; X1 = 1<<i
ldr x0, [sp,8]
; X0 = a
and x0, x1, x0
; X0 = X1&X0 = (1<<i) & a
; X0 contain zero? then jump to .L3, skipping "rt" increment
cmp x0, xzr
beq .L3
; rt++
ldr w0, [sp,24]
add w0, w0, 1
str w0, [sp,24]
.L3:
; i++
ldr w0, [sp,28]
add w0, w0, 1
str w0, [sp,28]
.L2:
; i<=63? then jump to .L4
ldr w0, [sp,28]
cmp w0, 63
ble .L4
; return rt
ldr w0, [sp,24]
add sp, sp, 32
ret
MIPS
Non-optimizing GCC
Listing 1.297: Non-optimizing GCC 4.4.5 (IDA)
f:
; IDA is not aware of variable names, we gave them manually:
rt = -0x10
i = -0xC
var_4 = -4
a = 0