You might have a source file named hi.c and just run make hi, where
make figures out what to do automatically to build the final executable. See
make’s built-in rules with make -p.

Using Macros and Makefile Targets

Using make with macros can make a program portable. Macros allow users
of other operating systems to easily configure a program build by specifying
local values, such as the names and locations, or pathnames, of any required
software tools. In the following example, macros define the name of the
compiler (CC), the installer program (INS), where the program should be
installed (INSDIR), where the linker should look for required libraries
(LIBDIR), the names of required libraries (LIBS), a source code file (SRC),
the intermediate object code file (OBJS), and the name of the final program
(PROG):

Click here to view code image

a sample makefile for a skeleton program

CC= gcc
INS= install
INSDIR = /usr/local/bin
LIBDIR= -L/usr/X11R6/lib
LIBS= -lXm -lSM -lICE -lXt -lX11
SRC= skel.c
OBJS= skel.o
PROG= skel

skel:       ${OBJS}

                                ${CC}   -o  ${PROG} ${SRC}  ${LIBDIR}   ${LIBS}

install:    ${PROG}

                                ${INS}  -g  root    -o  root    ${PROG} ${INSDIR}

NOTE

The indented    lines   in  the previous    example are indented    with    tabs,   not

spaces. This    is  important   to  remember!   It  is  difficult   for a   person  to  see the

difference, but make    can tell.   If  make    reports confusing   errors  when    you

first   start   building    programs    under   Linux,  check   your    project’s   makefile    for

the use of  tabs    and other   proper  formatting.

Using the makefile from the preceding example, you can build a program like
this:

Click here to view code image
matthew@seymour:~$ sudo make