tells the PIC that the IRQ has ended and the ISR is cleared. The highest priority IRQ pend-
ing in the IRR is then placed in the ISR, and the process repeats.
I/O Addresses
As I explained earlier in the chapter, the CPU and peripheral devices must have a way to
communicate with each other and a place to store messages and data they need to pass to
other devices. To that end, each device is assigned a small space in memory where it can
place and receive data. This area is called by many names: the I/O address, the I/O port,
the I/O base address, and a few others. It is most commonly referred to as an I/O address
or the address through which a device performs its input and output operations.
For example, when a network adapter gets information from the CPU to send over the
network, the data is placed in the NIC’s I/O address. When the NIC gets data from the net-
work to pass to the CPU, the data is placed in the NIC’s I/O address. Each device has an
I/O buffer assigned to it that should be large enough for the tasks it performs and the data
it handles.
This approach to how devices communicate is called Memory-Mapped I/O. Each de-
vice is mapped to a specific location in memory (hence the name). After a device has
placed data in its I/O address area, it contacts the CPU to let it know the data is ready,
perhaps with an IRQ. If the CPU knows which device it is servicing, it knows where in
memory that device’s I/O buffer is located.
Not every device processes the same amount of data; as a result, I/O addresses vary
in size. A NIC must handle much more data than a keyboard and therefore needs a bigger
I/O area to buffer its incoming and outgoing data than the keyboard ever needs. The
amount of space assigned to a particular device depends on its design and the bus archi-
tecture it uses. Most devices use 4, 8, or 16 bytes, but there are some devices that use as lit-
tle as 1 byte and some that use as much as 64 bytes.
Although there are thousands of I/O areas available, conflicts do occur when multi-
pledevicestrytousetheI/Oaddress,whichrepresentsonlythefirstbyteofadevice’sas-
signed I/O area, or when devices have overlapping areas. For example, network cards
are commonly assigned the I/O address of 360h (thehindicates that the I/O address is a
hexadecimal number and is usually expressed as such). The default I/O address for the
first parallel port (LPT1) is 378h. If the NIC requires 32 bytes of I/O space, its ending ad-
dress would be 37Fh. As you can see, this would create an overlapping conflict with the
parallel port. If there are no parallel devices in use, this isn’t a problem, but if a printer is
attached to the LPT1 port, a different location needs to be assigned to the NIC.
Common I/O Address Assignments
While there are no hard and fast rules or standards that set the assignment of I/O ad-
dresses in stone, there is a generally accepted list of I/O address assignments that is used
throughout the computing industry. Table 13-3 lists the most common or default I/O ad-
dress assignments used on PCs.
(^298) PC Hardware: A Beginner’s Guide