Chapter 3: Microprocessors^55
Socket 4 A 273-pin inline-layout processor connector supporting 5V Pentium 60
and Pentium 66 processors.
Socket 5 A 320-pin staggered-layout connector supporting early 3V
Pentium processors.
Socket 6 A 235-pin inline-layout processor connector for 3V
486DX4 processors.
Socket 7 A 321-pin staggered-format socket created to support later Pentium
processors. It used a common interface between the L2 cache bus and the main
system bus. This common interface typically limited the bus’s clock speed.
AMD K6, Cyrix 6x86, and IDT processors also use this socket format. This
design also provided for a Voltage Regulator Module to allow different voltage
levels to be implemented by the socket (see Figure 3-9).
Super 7 Sockets An extension of the Socket 7 design to support 100MHz
bus speeds on AMD K6-2 and K6-3 processors allowing them to see an almost
50 percent increase in bandwidth and get around the limitations of the Socket 7.
Socket 8 A 386 pin staggered ZIF-socket format for the Pentium
Pro processor.
Socket 370 The original Celeron main board connection. This supported the
early Celerons in the Plastic Pin Grid Assembly (PPGA) format (see Figure 3-10).Figure 3-9. A Socket 7 microprocessor socket