Digital Logic Fundamentals Unit 7 – Tri-State Output
Exercise 1 – Tri-State Buffer Output Control
EXERCISE OBJECTIVE
When you have completed this exercise, you will be able to demonstrate how the enable and data
inputs control the output state of a tri-state buffer. You will verify your results with an
oscilloscope.
EXERCISE DISCUSSION
- The tri-state output circuit has two transistors connected in a totem pole configuration.
- The tri-state buffer has a data enable (EN) input.
- A tri-state buffer has three output states: high impedance (high-Z), high (logic 1), or low
(logic 0). - When EN is inactive (low) the buffer output is in the high-Z state.
- When EN is active (high) the buffer output has the same state as the DATA INPUT.