Digital Logic Fundamentals Unit 8 – TTL and CMOS Comparison
A comparison between a 7400 series TTL gate and a 4000 series CMOS gate is made above.
The input of a FET does not require current; consequently, a CMOS gate usually uses less power
than a TTL gate at moderate clock frequencies.
However, at very high clock frequencies (switching rates) the power consumption of a CMOS
gate increases to TTL consumption levels.
A TTL gate switches logic levels faster than a CMOS gate does. Therefore, you should weigh
power savings against switching speed when deciding between a CMOS or TTL gate.
Because low power consumption means low heat generation, a CMOS has a higher packing
density. Many more gates can be placed per unit of IC area.
Electrical noise can cause false output logic states. CMOS gates have a wider voltage range
between the input low voltage (VIL) and the input high voltage (VIH) and, as a result, have
better noise immunity than do TTL gates.
TTL gates have a nominal positive supply voltage (VCC) of 5 Vdc (4.75 Vdc to 5.25 Vdc). The
negative supply is ground.