Department of Computer Scien

ce and Information Engineering

National Cheng Kung University, TAIWAN

PIN HANEL

DESCRIPTION

RST(cont’)

‰In order for the RESET input to be effective, it must have a minimum duration of 2 machine cycles

¾In other words, the high pulse must be high for a minimum of 2 machine cycles before it is allowed to go lowPower-on RESET circuit

Power-on RESET with debounce

Vcc 8.2K

30 pF 30 pF

11.0592 MHz

+

31 EA/Vpp 19 X1 X2 18 RST^9

10 uF

Vcc 8.2K

30 pF 30 pF

31 EA/Vpp 19 X1 X2 18 RST^9

10 uF

P1.0P1.1P1.2P1.3P1.4P1.5P1.6P1.7RST(RXD)P3.0(TXD)P3.1(INT0)P3.2(INT1)P3.3(T0)P3.4(T1)P3.5(WR)P3.6(RD)P3.7XTAL2XTAL1GND

VccP0.0(AD0)P0.1(AD1)P0.2(AD2)P0.3(AD3)P0.4(AD4)P0.5(AD5)P0.6(AD6)P0.7(AD7)-EA/VPPALE/PROG-PSENP2.7(A15)P2.6(A14)P2.5(A13)P2.4(A12)P2.3(A11)P2.2(A10)P2.1(A9)P2.0(A8)

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(^40393837363534333280513130) (8031) 292827262524232221