SEMICONDUCTOR DEVICE PHYSICS AND DESIGN

INTRODUCTION xxiii

SiGe-BiCMOS

technology

GaAs HBT

technology

Si CMOS

technology

Figure .3: The POLARIS total radio solution from RFMD. Picture courtesy of A. Upton, R.
Vetury, and J. Shealy, RFMD.

So what does the future hold for semiconductor based device development? There are brick
walls facing the conventional scaling of CMOS circuits. Beyond the year 2012 and the 18 nm
node, several of the pathways to continued scaling are not obvious. Also, the power dissipation in
the chip threatens to set a thermal limit to the size and the speed of processors in the future. This
is best illustrated in figure .4, where it is clear that today’s chips seem hotter than a hot plate,
and chips of the future in a tongue-in-cheek prediction may rival the sun’s surface (obviously
impossible). Hence now is the time for all of us to rethink the conventional CMOS scaling
paradigm and consider what new pathways may open up. Could compound semiconductors,
with their high electron mobilities and velocities, play a role in achieving high clock speeds
and reduced power levels? Could large bandgap materials such as Gallium Nitride play a role
in applications where the operating temperature is continuously rising? Are there completely
new devices such as Carbon Nanotubes (CNTs) which operate in the ballistic regime of electron
and hole transport that can emerge as the dark horse in future complementary circuits? Or is
molecular electronics, the use of the electronic states of the molecule to achieve computation, the