SEMICONDUCTOR DEVICE PHYSICS AND DESIGN

8.7. DESIGN ISSUES IN HFETS 405

18 20 22 24 26 28

10

15

20

25

30

35

050210FC-26A2

f = 40 GHz

LG = 160 nm

VDS = 30 V, VGS = -2.5 V

P

out

(dBm)

Pin (dBm)

0

5

10

15

20

25

30

35

40

Pout

PAE

Gain

Gain (dB). PAE (%)

0

5

10

15

20

25

30

35

40

3 8 13 18 23 28

0

10

20

30

40

50

60

Pout

Gain

PAE

Pin(dBm)

Pout

(dBm), Gain (dB)

PAE (%)

Pout=32.2 W/mm

PAE=54.8%

(a)

(b)

Figure 8.31: (a) Power performance of an AlGaN/GaN HFET at 40 GHz. The maximum power
output of this devicePout> 10. 5 W/mm with a PAE of 33%. Figure courtesy of T. Palacios,
UCSB.(b) Record power densities have been achieved by employing field plates in AlGaN/GaN
technology. Shown here are power measurements taken at 4 GHz of a 246μm wide device
biased atVDS= 120V. The maximum output power densityPout=32. 2 W/mm with a PAE of
54.8%. Figure courtesy of Y.-F. Wu, Cree Inc.