SEMICONDUCTOR DEVICE PHYSICS AND DESIGN

9.3. METAL-OXIDE-SEMICONDUCTOR CAPACITOR 445

If the body is at a biasVSBwith respect to the inversion region, then the surface potential needed
to cause inversion becomes+2φF+VSB. Replacing this value forψsin Eqns. 9.3.12 and 9.3.14,
we get, for the threshold voltage,

VT=Vfb+2φF+(2esNa| 2 φF+VSB|)^1 /^2

1

Cox

(9.3.15)

In the Si/SiO 2 interface region there are often traps or charge centers. Since Si and SiO 2 have
quite different lattice structures. These centers can cause a shift in the threshold voltage. Let
Nt(x)be the position-dependent trap density in the MOS device in the oxide region. The traps
will have additional charge, which will cause a voltage drop across the insulator. The voltage
drop will cause a shift in the flat-band voltage and hence the threshold voltage that is given by
Gauss’ law and the superposition principle as

ΔVfb(oxidecharge)=ΔVT=

−e

Cox

∫dox

o

zNt(z)

dox

dz (9.3.16)

Note that the value of the integral is the centroid of the charge distribution. Variations inVT
can have serious consequences for the device turn-on Note that that the effect of the interface
trap charge on the threshold voltage depends upon where the charge is spatially located. It has
the least effect if it is near the gate (z=0), and has the maximum effect if it is at the Si-SiO 2
interface (z =dox).IfQssis the effective fixed charge density per unit area at the oxide-
semiconductor interface, the potential drop will occur across the oxide and the flat-band voltage
changes from its ideal valueφMStoφMS−QSS/Coxor

ΔVfb(interf acecharge)=Vox(@FB)=

−Qss

Cox

Adding the voltage shift due to interface charge, the threshold voltage expression becomes

VT=Vfb+2φF+

[

2 esNa|− 2 φF+VSB|^1 /^2

] 1

Cox

(9.3.17)

whereVfb=φMS−QSS/Cox−Ceox

∫dox

o

zNt(z)
dox dzand defining a parameter,γ, known as the
body factor as

γ=

1

Cox

√

2 esNa (9.3.18)

we can write the equation for the threshold voltage as

VT=VTO+γ

(√

| 2 φF+VSB|−

√

2 |φF|

)

(9.3.19)

whereVTOis the threshold voltage whenVSB=0. The expressions given above are valid for
NMOS or PMOS. Of course,Nahas to be replaced by substrate dopingNdin the case of a
PMOS. The signs for various terms in the threshold voltage equation for NMOS and PMOS are
provided in table 9.1.