SEMICONDUCTOR DEVICE PHYSICS AND DESIGN

464 CHAPTER 9. FIELD EFFECT TRANSISTORS: MOSFET

Vout

t

t

t

Vin

ID

Vin Vout

D

D

S

S

+V

p-channel

n-channel

+++

+++

NMOS: OFF PMOS: ON

NMOS: ON PMOS: OFF

(a)

(b)

Figure 9.19: (a) A complementary MOS structure shown to function as an inverter. The circuit
draws current only during the input voltage switching. (b) A schematic of the CMOS structure.

9.5.4 ComplementaryMOSFETs ........................

It is possible to greatly reduce the power dissipation problem if an enhancement-moden-
channel device is connected to an enhancement-modep-channel device in series. This is the
complementary MOSFET or CMOS and is fabricated on the same chip, as shown in figure 9.19.
In the CMOS inverter shown, the drains of then-andp-MOSFET are connected and form the
output. The input is presented to the gates of the device as shown. Thep-channel device has a
negative threshold voltage while then-channel device has a positive threshold voltage. When a
zero input voltageVinis applied, the voltage between the source and gate of then-channel device
is zero, turning it OFF. However, the voltage between the gate and source of thep-channel device
is−Vsince the source of thep-channel device is at+V. This turns thep-channel device ON.