Chapter 11
A microcontroller can communicate with the MAX3100 by sending and receiv-
ing synchronous data. The microcontroller can toggle SCLK as needed without
worrying about maintaining a specific bit rate. The only restrictions on SCLK’s
frequency are a minimum pulse width (high or low) of 100 ns and a minimum
clock period (high + low) of 238 ns.
The synchronous interface exchanges 16-bit words. Eight bits are data, and the
other bits can hold status and control information. The chip can also send and
receive configuration data.
A crystal or ceramic resonator provides the timing reference for the UART’s
bit-rate generator. A 1.8432MHz crystal supports bit rates from 300 to
115,200.
On receiving synchronous data to transmit, the MAX3100 writes a Start bit,
the data bits, a parity bit if used, and a Stop bit to TX. The data can have 7 or 8
bits plus an optional parity bit. The MAX3100 doesn’t calculate a value for a
parity bit so the sending device must set the parity as desired. The Max3100
can generate an interrupt request on receiving a parity bit of 1.Figure 11-2: The MAX3100 converts between SPI or Microwire serial data and
asynchronous format.