Physics and Engineering of Radiation Detection

500 Chapter 8. Signal Processing

8.7.B A/DConversionMethods

B.1 DigitalRampADC.......................

This simple technique involves a digital to analog converter (DAC), which is used
to convert the output of a binary counter. A comparator compares this output to
the analog input signal height to decide whether the counter should continue with
counting or stop. The counter is stopped when the two voltages are within the set
tolerance level. The counter is provided with a clock pulse through either a built-in
or an external oscillator. Fig.8.7.1 shows a schematic diagram of such an ADC.

−

+

Clock

Counter

Read

Load

Converter

Analog

Digital

to

Output

Register

Shift

Vin

Comparator

Figure 8.7.1: A digital ramp ADC having 8-bit resolution.

At the start of the conversion cycle the DAC output is lower than the input
voltage and consequently the comparator output goes high. This forces the counter
to start counting up with each clock pulse (see Fig.8.7.2). The output is then fed
directly to the DAC, which outputs a slightly higher voltage. This voltage is then
again compared with the inputvoltage. If the input voltageis still higher than the
DAC output, the comparator output will remain high and the counter will continue
with counting. This counting process stops as soon as the DAC output exceed the
input voltage, since at that point the comparator’s output goes low. To read out
counter’s value at that point, a shift register is provided which loads the binary count
as soon as the comparator’s output becomes low. This low output of the comparator
also causes the counter to reset to zero and become available for the next cycle.
This technique of digital ramping suffers from the following two major problems
that make it undesirable for some applications.

Slow Sampling. The fact that the counter has to count from zero at each

conversion cycle makes the process very slow and unsuitable for high rate ap-

plications.