Physics and Engineering of Radiation Detection

502 Chapter 8. Signal Processing

−

+

Clock

Read

Converter

Analog

Digital

to

Output

Register

Shift

Vin

Comparator

Successive

Approx.

Register

Status

Figure 8.7.3: Schematic of an 8-bit successive approximation

ADC.

Vin

Time

Digital Output

Figure 8.7.4: Conversion cycles in a suc-

cessive approximation ADC.

B.4 WilkinsonADC.........................

Wilkinson ADC belongs to a class ofslopeorintegratingADCs. As opposed to
other ADCs we visited earlier, slope ADCs do not employ DAC, thus eliminating
the major source of differential nonlinearity.
The main idea behind this type of ADC is to save the input pulse on an analog
memory capacitor and then allow it to discharge slowly. A counter keeps on counting
during the linear discharge of the capacitor. The final digital word is proportional
to the analog input. The following are the steps that a typical Wilkinson ADC takes
during a conversion cycle (see also Fig.8.7.7(a)).

1.The input pulse amplitude is stretched to a wide pulse using a pulse stretcher

circuitry. Commonly used method is the so calledsample and holdcircuit, in

which the analog voltage is sampled on a capacitor through a FET switch (see

Fig.8.7.7(b)).

2.The stretched pulse is transferred to a memory capacitor.