330 Chapter 12
emitter-to-base circuit is open. Emitter-cutoff current
flows when the emitter to base is reverse biased and the
collector-to-base circuit is open.
Small- and Large-Signal Characteristics. The tran-
sistor, like the vacuum tube, is nonlinear and can be
classified as a nonlinear active device. Although the
transistor is only slightly nonlinear, these nonlinearities
become quite pronounced at very low and very high
current and voltage levels. If an ac signal is applied to
the base of a transistor without a bias voltage, conduc-
tion will take place on only one-half cycle of the applied
signal voltage, resulting in a highly distorted output
signal. To avoid high distortion, a dc-biased voltage is
applied to the transistor, and the operating point is
shifted to the linear portion of the characteristic curve.
This improves the linearity and reduces the distortion to
a value suitable for small-signal operation. Even though
the transistor is biased to the most linear part of the
characteristic curve, it can still add considerable distor-
tion to the signal if driven into the nonlinear portion of
the characteristic.
Small-signal swings generally run from less than
1 μV to about 10 mV so it is important that the
dc-biased voltage be large enough that the applied acFigure 12-26. Basic design circuit for transistor bias circuits.Length
Widthn-TypeGateSn-Type FieldDP-TypeVD IDThicknessSource Gate-1 Drainp-Type
n-Type ChannelGate-2
A. Plain semiconductor bar. B. Bar with gate added and drain
voltage applied.C. Cross-sectional view of the
construction for a single- or double-
gate field-effect transistor.
Source
P SiliconSource
Metallic
Film Drain
P SiliconGate insulator
n Silicon silicon dioxide
D. Internal construction of an
insulated-gate transistor (IGT).n Input
Gate22 M 720 V2 k 7
DrainSubstrate
SourceE. Typical circuit for an IGT transistor.+ G D+
RLD
RG RSF. n-channel field-effect transistor
circuit.G. p-channel field-effect transistor circuit. H. n-channel double-gate field-effect transistor circuit.0 0V(^) +
S
- G D+
RLD
RG RS
S - G D+
RLD
RG RS
S
Figure 12-27. Basic bias circuits for transistors
R 1
R 2
R 4
R 3
R 5
R 6
VCC
B
C
E
In
Out