Handbook for Sound Engineers

Tubes, Discrete Solid State Devices, and Integrated Circuits 361

Figure 12-75. THAT 1606 application. Courtesy THAT Corporation.

Table 12-4. Digital Circuit Terminology

Adder Switching circuits that generate sum and carry bits.

Address A code that designates the location of information and instructions.

AND A Boolean logic operation that performs multiplication. All inputs must be true for the output to be true.

Asynchronous A free-running switching network that triggers successive instructions.

Bit Abbreviation for binary digit; a unit of binary information.

Buffer A noninverting circuit used to handle fan-out or convert input and output levels.

Byte A fixed-length binary-bit pattern (word).

Clear To restore a device to its standard state.

Clock A pulse generator used to control timing of switching and memory circuits.

Clock rate The frequency (speed) at which the clock operates. This is normally the major speed of the computer.

Counter A device capable of changing states in a specified sequence or number of input signals.

Counter, binary A single input flip-flop. Whenever a pulse appears at the input, the flip-flop changes state (called a T flip-flop).

Counter, ring A loop or circuit of interconnected flip-flops connected so that only one is on at any given time. As input signals are

received, the position of the on state moves in sequence from one flip-flop to another around the loop.

Fan-in The number of inputs available on a gate.

Fan-out The number of gates that a given gate can drive. The term is applicable only within a given logic family.

Flip-flop A circuit having two stable states and the ability to change from one state to the other on application of a signal in a

specified manner.

Flip-flop, D D stands for delay. A flip-flop whose output is a function of the input that appeared one pulse earlier; that is, if a 1

appears at its input, the output will be a 1 a pulse later.

Flip-flop, JK A flip-flop having two inputs designated J and K. At the application of a clock pulse, a 1 on the J input will set the

flip-flop to the 1 or on state; a 1 on the K input will reset it to the 0 or off state; and 1s simultaneously on both inputs

will cause it to change state regardless of the state it had been in.

Flip-flop, RS A flip-flop having two inputs designated R and S. At the application of a clock pulse, a 1 on the S input will set the

flip-flop to the 1 or on state, and a 1 on the R input will reset it to the 0 or off state. It is assumed that 1s will never

appear simultaneously at both inputs.

Flip-flop, R,

S, T

A flip-flop having three inputs, R, S, and T. The R and S inputs produce states as described for the RS flip-flop above;

the T input causes the flip-flop to change states.

Flip-flop, T A flip-flop having only one input. A pulse appearing on the input will cause the flip-flop to change states.

Gate A circuit having two or more inputs and one output, the output depending on the combination of logic signals at the

inputs. There are four gates: AND, OR, NAND, NOR. The definitions below assume positive logic is used.

Gate, AND All inputs must have 1-state signals to produce a 0-state output.

Gate, NAND All inputs must have 1-state signals to produce a 1-state output.

Gate, NOR Any one or more inputs having a 1-state signal will yield a 0-state output.

Gate, OR Any one or more inputs having a 1-state signal is sufficient to produce a 1-state output.

In+

7

Gnd

6

In+

In–

In– 5

D 3

1N4004

D 4

1N4004

D 5

1N4004

D 6

1N4004

C 3

100p

C 8

100p

L 1

Ferrite Bead

L 2

Ferrite Bead

Out–

3

4

Out+

14

U1

THAT1606

Vcc

C 4

100n

C 5

100n

Cap1

Cap2

C 1

12 100n

1113

R 1

1M0

2

3

1

XLR (M)

Vcc

Vee

Vee