944 Chapter 25
Figure 25-113. Rider pot multiplexing and address decoding.Figure 25-114. An A/D converter (as part of the system in Fig. 25-113).Multiplexted
bus to A/D
converterSixteen
rider pots1/4 40111/4 40110 1 2 3 4Channel
select
line
1/4 401140281/4 40113
2
1
0Select
outputs
to switch
(5, 2, B, A)VAD (Valid A/D decode address)4028Address bus40514051Multiplex
analogue
busMultiturn
zero trim10 V referenceBus buffer
AD507Gain trimAD7574Up1/4 4011RDBusy10 V reference Wait R/W 0 1 2 3 4 5 6 7 VAD Data BusValid A/D decide address+5 V