Preamplifi ers and Input Signals 181
In the circuit of Figure 7.10 , the input transistors are used in a more conventional
common-emitter mode, but the two input devices, although in a push–pull confi guration,
are effectively connected in parallel so far as the input impedance and noise fi gure are
concerned. The very high degree of symmetry of this circuit assists in minimizing both
harmonic and transient distortions.
Both of these circuits are designed to operate from 3-V DC “ pen cell ” battery supplies
to avoid the introduction of mains hum due to the power supply circuitry or to earth loop
effects. In mains-powered head amps, great care is always necessary to avoid supply line
signal or noise intrusions in view of the very low signal levels at both the inputs and the
outputs of the amplifi er stage.
It is also particularly advisable to design such amplifi ers with single point “ 0-V ” line
and supply line connections, which should be coupled by a suitable combination of good
quality decoupling capacitors.
0V
Set offset zero
BC214
47 K
68 K
3K9 1K5
BC214 10 K
100 μ 330 R
330 R
1.66 mA
BC414
BC184
1K5 3K9
660 μA 270 μA
0V
0V
0V
Input from PU
BD538
BD537
0.1μ
56 R 0.1μ
5 μA
0.1μ
1 nF
0 V
(^40) (Gain)
20
18 R
330 R 1.5 V
2.6 mA
0V
0V
1.5
0.1μF^470 μF
470 μF
470 μF
470 μF
1K5
1nF
18 R
100 μF
10K
1K5
Figure 7.10 : Very low-noise, low-distortion, symmetrical MC head amplifi er.