192 Chapter 7
impedance of this, the lower the distortion that will be introduced by the stage, for any
given output voltage signal.
If a high value resistor is used as the collector load for Q 1 in Figure 7.22 , either a very
high supply line voltage must be applied, which may exceed the voltage ratings of the
devices, or the collector current will be very small, which will reduce the gain of the
device and therefore tend to diminish the benefi t arising from the use of a higher value
load resistor.
Various circuit techniques have been evolved to circumvent this problem by producing
high dynamic impedance loads, which nevertheless permit the amplifying device to
operate at an optimum value of collector current. These techniques are discussed later.
An unavoidable problem associated with the use of high values of collector load
impedance as a means of attaining high stage gains in such amplifi er stages is that the
effect of “ stray ” capacitances, shown as Cs in Figure 7.23 , is to cause the stage gain to
decrease at high frequencies as the impedance of the stray capacitance decreases and
progressively begins to shunt the load. This effect is shown in Figure 7.24 , in which the
“ transition ” frequency, fo (the –3-dB gain point) is that frequency at which the shunt
impedance of the stray capacitance is equal to that of the load resistor, or its effective
equivalent, if the circuit design is such that an “ active load ” is used in its place.
VR 2EoutCsQ 1
EinFigure 7.23 : Circuit effect of stray capacitance.