Recording Consoles 799Architecture of DSP Devices
The fi rst computers, including those developed at Harvard University, had separate
memory space for program and data; this topology being known as Harvard
architecture. In fact, the realization, by John von Neumann—the Hungarian-born
mathematician—that program instructions and data were only numbers and
could share the same “ address space ” was a great breakthrough at the time and
was suffi ciently radical that this architecture is often named after its inventor.
The advantage of the von Neumann approach was great simplifi cation but at the
expense of speed because the computer can only access either an instruction or
data in any one processing clock cycle. The fact that virtually all computers follow
this latter approach illustrates that this limitation is of little consequence in the
world of general computing.
However, the speed limitation “ bottleneck, ” inevitable in the von Neumann machine,
can prove to be a limitation in specialist computing applications such as digital
audio signal processing. As we have seen in the case of digital fi lters, digital signal
processing contains many, many multiply and add type instructions of the form
ABCD⋅Unfortunately, a von Neumann machine is really pretty ineffi cient at this type of
calculation so the Harvard architecture lives on in many DSP chips, meaning that
a multiply and add operation can be performed in one clock cycle; this composite
operation is termed a Multiply ACcumulate (MAC) function. A further distinction
pertains to the incorporation within the DSP IC of special registers that facilitate
the managing of circular buffers for the implementation of reverb, phasing, chorus,
and fl anging effects.
The remaining differences between a DSP device and a general purpose digital
microcomputer chip relate to the provision of convenient interfaces, thereby
allowing direct connection of ADCs, DACs, and digital transmitter and receiver ICs.
Convolution
In the simple three-stage digital fi lter, we imagined the step function being
multiplied by a quarter, then by a half, and fi nally by a quarter again; at each stage,
the result was added up to give the fi nal output. This actually rather simple process
is given a frightening name in digital signal processing theory, where it is called
convolution.