Chapter 1: Introduction and Overview
- The addresses that occur most frequently in address translation are held in a fast CPU cache
called aTranslation Lookaside Buffer(TLB). Translation is accelerated because the address data
in the cache are immediately available without needing to access the page tables and there-
fore the RAM.
While caches are operated transparently on many architectures, some require special
attention from the kernel, which especially implies that their contents must be invalidated
whenever the contents of the page tables have been changed. Corresponding calls must be
present in every part of the kernel that manipulates page tables. If the kernel is compiled for
an architecture that does not require such operations, it automatically ensures that the calls
are represented by do-nothing operations.
Interactionwith the CPU
The IA-32 architecture uses a two-level-only method to map virtual addresses to physical addresses.
The size of the address space in 64-bit architectures (Alpha, Sparc64, IA-64, etc.) mandates a three-level
or four-level method, and the architecture-independentpart of the kernel always assumes a four-level
page table.
The architecture-dependentcode of the kernel for two- and three-level CPUs must therefore emulate the
missing levels by dummy page tables. Consequently, the remaining memory management code can be
implemented independently of the CPU used.
Memory Mappings
Memory mappingsare an important means of abstraction. They are used at many points in the kernel and
are also available to user applications. Mapping is the method by which data from an arbitrary source
are transferred into the virtual address space of a process. The address space areas in which mapping
takes place can be processed using normal methods in the same way as regular memory. However, any
changes made are transferred automatically to the original data source. This makes it possible to use
identical functions to process totally different things. For example, the contents of a file can be mapped
into memory. A process then need only read the contents of memory to access the contents of the file,
or write changes to memory in order to modify the contents of the file. The kernel automatically ensures
that any changes made are implemented in the file.
Mappings are also used directly in the kernel when implementing device drivers. The input and output
areas of peripheral devices can be mapped into virtual address space; reads and writes to these areas are
then redirected to the devices by the system, thus greatly simplifying driver implementation.
1.3.5 Allocation of Physical Memory
When it allocates RAM, the kernel must keep track of which pages have already been allocated and which
are still free in order to prevent two processes from using the same areas in RAM. Because memory
allocation and release are very frequent tasks, the kernel must also ensure that they are completed as
quickly as possible. The kernel can allocate only whole page frames. Dividing memory into smaller
portions is delegated to the standard library in userspace. This library splits the page frames received
from the kernel into smaller areas and allocates memory to the processes.