VHDL Programming

132 Chapter Five

TYPE fourvalvector IS ARRAY(natural RANGE <>) OF fourval;

FUNCTION resolve( s: fourvalvector) RETURN fourval;

SUBTYPE resfour IS resolve fourval;

END fourpack;

USE WORK.fourpack.ALL;

ENTITY mux2 IS

PORT( i1, i2, a : IN fourval;

q : OUT fourval);

END mux2;

ARCHITECTURE different OF mux2 IS

COMPONENT and2

PORT( a, b : IN fourval;

c : OUT fourval);

END COMPONENT;

COMPONENT inv

PORT( a : IN fourval;

b : OUT fourval);

END COMPONENT;

SIGNAL nota : fourval;

-- resolved signal

SIGNAL intq : resolve fourval := X;

BEGIN

U1: inv PORT MAP(a, nota);

U2: and2 PORT MAP(i1, a, intq);

U3: and2 PORT MAP(i2, nota, intq);

q <= intq;

END different;

The package fourpackdeclares all of the appropriate types and function

declarations so that the resolution function resolveis visible in the entity.

In the architecture declaration section, signal intqis declared of type

fourval, using the resolution function resolve. This signal is also given

an initial value of X.

Signal intqis required to have a resolution function because it is the

output signal for components U2and U3. Each component provides a driver

to signal intq. Resolution function resolveis used to determine the end

result of the two driver values. Signal notais not required to have a reso-

lution function because it only has one driver, component U1.