VHDL Programming

(C. Jardin) #1

156 Chapter Six


IF (addr = x_val) OR (addr = z_val) THEN
ASSERT FALSE
REPORT “ writing to unknown address”
SEVERITY ERROR;
data <= x_val;
ELSE
ram_data(addr) :=data_in;
data <= ram_data(addr);
END IF;

END IF;
END PROCESS;
END behave_ram;

This example implements an integer-based RAM device. There are
512 integer locations in the RAM, which is controlled by two control
lines. The first is cs(chip select), and the second is r_wb(read/write bar).
The model contains an IFstatement that initializes the contents of the
RAM to a known value. A boolean variable (ram_init) is declared to
keep track of whether the RAM has been initialized or not. If this vari-
able is false, the RAM has not yet been initialized. If true, initialization
has been performed.
The first time the process is executed, variable ram_initis false, and
the IFstatement is executed. Inside the IFstatement is a loop statement
that loops through every location of the RAM and sets the location to a
known value. This process is necessary because the starting value of type
INTEGERis the value integer’LEFT, or -2,147,483,647. Notice the use of
function array attributes ’LOWand ’HIGHto control the range of the initial-
ization loop.
After the loop has been executed and all RAM locations have been
initialized, the ram_initvariable is set to true. Setting the variable
ram_initto true prevents the initialization loop from executing again.
The rest of the model implements the read and write functions based
on the values of addr,data_in,r_wb, and cs. This model performs a lot of
error checking for unknown values on input ports. The model tries to intel-
ligently handle these unknown input values.

Function Signal Attributes


Function signal attributes are used to return information about the behav-ior
of signals. These attributes can be used to report whether a signal
has just changed value, how much time has passed since the last event
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