VHDL Programming

(C. Jardin) #1
In Figure 12-7, location 48 is all zeroes. In Figure 12-8, location 48 is
no longer all zeroes, but has the first value from the block copy operation.
If the simulation is run completely, one by one the data from the source
array (location 16 ) is copied to the destination (location 48 ). After the last
location is copied, the program repeats the same steps.

SUMMARY


In this chapter, we examined the top level of a design that consisted of a
CPU, a memory array, and the top-level instantiation of those components.
In the next chapter, we examine the CPU in more detail.

302 Chapter Twelve


Figure 12-8
The Memory Array
After the Copy.

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