CPU: RTL Simulation 333
combinational process and a sequential process. The combinational
process calculates the next state of the counter, and the sequential process
keeps track of the current state of the counter and updates the next state
of the counter on a rising edge of the clkinput. We use the counter to dis-
cuss a number of different types of testbenches.Stimulus Only
The stimulus only testbench contains the stimulus driver and DUT blocks
of a testbench. The verification process is left to the designer. This type of
testbench is useful at the beginning of a design project when no known
good vectors exist, or for a quick check of an entity.
Following is an example stimulus only testbench:ENTITY testbench IS END;-----------------------------------------------------------
-- STIMULUS ONLY
-- testbench for 8-bit loadable counter
-- reads from file “counter.txt”
-----------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE std.textio.ALL;
USE ieee.std_logic_textio.all;
USE WORK.count_types.all;
ARCHITECTURE stimonly OF testbench IS-----------------------------------
-- component declaration for counter
-----------------------------------
COMPONENT count
PORT (clk : IN std_logic;
ld : IN std_logic;
up_dwn : IN std_logic;
clk_en : IN std_logic;
din : IN bit8;
qout : INOUT bit8);
END COMPONENT;SIGNAL clk, ld, up_dwn, clk_en : std_logic;
SIGNAL qout, din : bit8;BEGIN
-- instantiate the component
uut: count PORT MAP(clk => clk,
ld => ld,
up_dwn => up_dwn,