340 Chapter Fourteen
20 0101 10 255
30 1001 0 10
40 0001 0 10
50 1001 0 8
60 0001 0 8
70 1001 0 7
80 0001 0 7
90 1001 0 6
100 0101 100 100
110 1001 0 100
120 0001 0 100
130 1001 0 98
140 0001 0 98
150 1001 0 97
160 0001 0 97
Notice that the vector file looks nearly the same as the stimulus only
vector file except for the extra columns for the expected results.
The full testbench can be used to verify that a DUT matches a specifi-
cation. To do so, the specification must include a set of known good results
that the testbench can match against.
The full testbench can also be used to verify that a small change or
optimization still matches the known good results. A designer may find a
small error during verification that only requires a small localized
change to the design. The designer can make the change and rerun the
testbench to make sure that the change did not affect the rest of the design,
and that the design still functions properly.
Testbenches can also be used to sign off designs. After the design
matches the testbench results, the design is ready to be put into production,
or be signed off.
The stimulus only and full testbench are only a couple examples of
the many ways that a testbench can be written. Another example is the
simulator-specific testbench.Simulator Specific
The simulator-specific testbench is written specifically for one brand of
simulator. Most simulators include a command language that allows the
designer to control the simulator. The designer can compile designs, load
designs, create libraries, set breakpoints, run the simulation, and lots of
other tasks using the simulator command language. Most of these sim-
ulators also allow the designer to set signals to new values. Using com-
mand languages, the designer can write a testbench. Following is an ex-
ample of a simulator-specific testbench: