VHDL Programming

(C. Jardin) #1
cursor shows the position of the trigger. Also notice that the first two
signals in the waveform display are Sample Clockand Cycle. These are
added signals used to provide reference points in the waveform. The
sample clock is used to show the reference edges where sample data was
captured. The cycle number shows the relative position within the sample
buffer. Cycle number 0 is the trigger point, positive values are after the
trigger, and negative values are before the trigger.

Set Watchpoint


Another way to specify trigger conditions is to specify watchpoint ex-
pressions on signals. A watchpoint expression defines a value or transi-
tion that a signal will trigger. When the signal value equals the trigger
value or transitions from one value to another, the IICE will trigger and
cause the sample buffer to be transferred to the debugger. To set a watch-
point expression, click on a signal in the debugger source window. The
Watchpoint Expression dialog box appears (see Figure 18-12).

At Speed Debugging Techniques 409


Figure 18-9
Breakpoint Enabled
on Loadl2.

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