VHDL Programming

Appendix B: VHDL Reference Tables 441

All of the next examples apply to the following declaration:

TYPE a_type IS ARRAY(0 TO 3, 7 DOWNTO 0) OF BIT;

Table B-4 lists all predefined attributes that return information about

signals or create new signals. For more detailed information, see Chapter

6,“Predefined Attributes.”

Table B-5 lists all of the operators and their relative precedence.

Table B-6 lists all of the different types of literals and a sample usage.

In all cases, the _ character is ignored when interpreting the value of

a literal. The base that the exponent in the based integer and based real

examples is applied to is the base specified for interpreting the number.

Bit string literals are used to specify values for types that resemble the

BIT_VECTORtype.

Table B-3 Attribute Explanation Example

A’LEFT(N) Returns left array bound a_type’LEFT(1) is 0

of selected index range a_type’LEFT(2) is 7

A’RIGHT(N) Returns right array bound a_type’RIGHT(1) is 3

of selected index range a_type’RIGHT(2) is 0

A’HIGH(N) Returns largest array a_type’HIGH(1) is 3

bound value of selected a_type’HIGH(2) is 7

index range

A’LOW(N) Returns smallest array a_type’LOW(1) is 0

bound value of selected a_type’LOW(2) is 0

index range

A’RANGE(N) Returns selected index a_type’RANGE(1) is 0

range TO 3

a_type’RANGE(2) is 7

DOWNTO 0

A’REVERSE_RANGE(N) Returns selected index a_type’REVERSE_RANGE(1)

range reversed is 3

DOWNTO 0

a_type’REVERSE_RANGE(2)

is 0 TO 7

A’LENGTH(N) Returns size of selected a_type’LENGTH(1) is 4

index range a_type’LENGTH(2) is 8