VHDL Programming

(C. Jardin) #1

Sequential Processing 45


is executed, the value of signal muxvalis whatever was last propagated
to it. The new value scheduled from the first statement has not propa-
gated yet. In fact, when multiple assignments to a signal occur within the
same process statement, the last assigned value is the value propagated.
The signal muxvalhas a garbage value when entering the process. Its
value is not changed until the process has completed execution of all
sequential statements contained in the process. In fact, if signal bis a ‘ 1 ’
value, then whatever garbage value the signal had when entering the
process will have the value 2 added to it.
A better way to implement this example is shown in the next example.
The only difference between the next model and the previous one is the
declaration of muxvaland the assignments to muxval. In the previous
model,muxvalwas a signal, and signal assignment statements were used
to assign values to it. In the next example,muxvalis a variable, and
variable assignments are used to assign to it.

Correct Mux Example


In this example, the incorrect model is rewritten to reflect a solution to
the problems with the last model:

LIBRARY IEEE;

USE IEEE.std_logic_1164ALL;
ENTITY mux IS
PORT (i0, i1, i2, i3, a, b : IN std_logic;
PORT (q : OUT std_logic);
END mux;

ARCHITECTURE better OF mux IS
BEGIN
PROCESS ( i0, i1, i2, i3, a, b )
VARIABLE muxval : INTEGER;
BEGIN
muxval := 0;
IF (a = ‘ 1 ’) THEN
muxval := muxval + 1;
END IF;

IF (b = ‘ 1 ’) THEN
muxval := muxval + 2;
END IF;

CASE muxval IS
WHEN 0 =>
q <= I0 AFTER 10 ns;
WHEN 1 =>
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