54 Chapter Three
The process statement contains one LOOPstatement. This LOOPstate-
ment logically “and”s the bits of arrays aand band puts the results in
array q. This behavior continues whenever the flag in array doneis not
true. If the doneflag is already set for this value of index i, then the NEXT
statement is executed. Execution continues with the first statement of the
loop, and index ihas the value i + 1. If the value of the donearray is
not true, then the NEXTstatement is not executed, and execution continues
with the statement contained in the ELSEclause for the IFstatement.
The NEXTstatement allows the designer the ability to stop execution of
this iteration and go on to the next iteration. There are other cases when
the need exists to stop execution of a loop completely. This capability is
provided with the EXITstatement.EXIT Statement
During the execution of a LOOPstatement, it may be necessary to jump
out of the loop. This can occur because a significant error has occurred
during the execution of the model or all of the processing has finished
early. The VHDL EXITstatement allows the designer to exit or jump out
of a LOOPstatement currently in execution. The EXITstatement causes
execution to halt at the location of the EXITstatement. Execution con-
tinues at the statement following the LOOPstatement.
Here is an example illustrating this point:PROCESS(a)
variable int_a : integer;
BEGIN
int_a := a;FOR i IN 0 TO max_limit LOOP
IF (int_a <= 0) THEN -- less than or
EXIT; -- equal to
ELSE
int_a := int_a -1;
q(i) <= 3.1416 / REAL(int_a * i); -- signal
END IF; -- assign
END LOOP;y <= q;END PROCESS;