7.2. History
Hardware Description Language (HDL) is used by designers to describe circuit functionality in high level
language. HDL design is then processed to implementable hardware circuit design.
The two main HDL development solutions on the market are Verilog Hardware Design Language
(Verilog) and Very high-speed integrated circuit Hardware Design Language (VHDL). Although Verilog
came on the market much earlier than VHDL, they both have equal market share currently.
Verilog
Introduced by Gateway Automation in 1984 as a proprietary language.
Purchases by Synopsis in 1988 which was eventually purchased by Cadence Design Systems.
Cadence Design System has successfully has successfully market Verilog to a market power
house.
Verilog was standardized as IEEE 1364 in 1995.
The syntax is similar to C language.
VHDL
The US department of Defense (DOD) and the IEEE sponsored the development of VHDL –
Standardized by IEEE in 1993.
Design may be decomposed hierarchically.
Each design element has a well-defined interface and a precise behavioral specification.
Behavioral specification can use either an algorithm or by a hardware structure.
Concurrency, timing, and clocking can all be modeled (asynchronous & synchronous
sequential circuit).
The syntax is a mix of Pascal and Ada software languages.
This chapter focuses exclusively on Verilog Hardware Description Language commonly refered to as
Verilog. There are sufficient similarity in structure and concepts between VHDL and Verilog that learning
one will significantly reduces the time required to learn the second language.
This chapter does not attempt to describe the complete Verilog HDL rather it introduce key concepts
underlying Verilog HDL and basic programming tools. Most Verilog development environment provide an
extensive reference which should be utilized in conjunction with this material.