Microsoft Word - Digital Logic Design v_4_6a

3.9. Programmable Logic Devices (PLDs)

PLDs allow a designer to implement his/her design on a single chip. The main advantages of PLDs are
speed of implementation, ease of implementation and low overall cost at low quantities. Most projects
use PLDs during the design phase because of the stated reasons. During production when the quantities
are higher, the design is typically implemented with one-time factory-programmed devices that are able to
implement the design.

A summary of PLD’s is shown below – the size in-terms of input/output and function, is growing on a daily
basis. Most designs will prototype using one of these devices until they have enough quantity to justify a
custom chip.

Device Type AND Array Connection OR Array Connections

PROM -Programmable Read Only

Memory

Fixed at the Factory Customer programmable

with Fuses

PLA - Programmable Logic Array Customer programmable

with Fuses

Customer programmable

with Fuses

PAL – Programmable Array Logic,

also called GAL - Generic Array Logic

Customer programmable

with Fuses

Fixed at the Factory

Introducing Key Symbols used in PLD Design

• Fuse Types Symbols

(1) Product Terms (Example)

(a) The output has a pull-up resistor that is not shown, and if all fuses are blown then the

output will be H.

(b) If all fuses are intact, then they may place an X in the And symbol.

(2) Sum Terms (Example)

(a) The output has a pull-down resistor (not shown), and if all fuses are blown, then the

output will be L.

(b) If all fuses are intact, then they may place an X in the OR Symbol.

A 1 A 0

A 1 .A 0

No Fuse

Fixed Connection at

factory

Intact Fuse

Programmable

Connection

Blown Fuse

Connection Broken after

Programming