Microsoft Word - Digital Logic Design v_4_6a

Programmable Array Logic (PAL) or Generic Array Logic (GAL)
PAL and GAL are two different way to refer to this technology. PALs are:

• Easiest to use, since only the AND array connection is programmable.


• Best suited for non-standard complex combination logic implementation.


• Available in variety of sizes. The larger versions are called Field Programmable Gate Array
  (FPGA). The version that can be configured at the factory for larger volume design is called
  Gate Arrays.


• Able to implement feeding back the outputs to and array for improved functionality.


• Available with 3-state outputs (1, 0, high impendence) which are controlled by input, OE.

(1) OE=0  output = open (which can be used to drive the pin as an input which is why

sometime 3-state pins are referred to as I/O)

(2) OE=1  output = input

A 1 A 0

p 0

p 1

F 0