Microsoft Word - iOSAppReverseEngineering.docx

-^ Register processing instructions

The basic syntax of register processing instructions is:

op{cond}{type} Rd, [Rn, Op2]

Rn, the base register, stores base address; the function of “cond” is the same to data

processing instructions; “type” decides the data type which “op” operates, there are 4 types:

B (unsigned Byte)

Extends to 32 bits when executing,filled with 0.

SB (Signed Byte)

For LDR only;extends to 32 bits when executing,filled with the sign bit.

H (unsigned Halfword)

Extends to 32 bits when executing,filled with 0.

SH (Signed Halfword)

For LDR only;extends to 32 bits when executing,filled with the sign bit.

The default data type is word if no “type” is specified.

There are only 2 basic register processing instructions: LDR (LoaD Register), which reads

data from memory then write to register; and STR (STore Register), which reads data from

register then write to memory. They’re used like this:

² LDR

LDR Rt, [Rn {, #offset}] ; Rt = *(Rn {+ offset}), {} is optional

LDR Rt, [Rn, #offset]! ; Rt = *(Rn + offset); Rn = Rn + offset

LDR Rt, [Rn], #offset ; Rt = *Rn; Rn = Rn + offset

² STR

STR Rt, [Rn {, #offset}] ; *(Rn {+ offset}) = Rt

STR Rt, [Rn, #offset]! ; *(Rn {+ offset}) = Rt; Rn = Rn + offset

STR Rt, [Rn], #offset ; *Rn = Rt; Rn = Rn + offset

Besides, LDRD and STRD, the variants of LDR and STR, can operate doubleword, namely,

LDR or STR two registers at once. The syntax of them is:

op{cond} Rt, Rt2, [Rn {, #offset}]

The use of LDRD and STRD is just like LDR and STR:

² STRD

STRD R4, R5, [R9,#offset] ; *(R9 + offset) = R4; *(R9 + offset + 4) = R5

² LDRD

LDRD R4, R5, [R9,#offset] ; R4 = *(R9 + offset); R5 = *(R9 + offset + 4)

Beside LDR and STR, LDM (LoaD Multiple) and STM (STore Multiple) can process several

registers at the same time like this:

op{cond}{mode} Rd{!}, reglist