0195136047.pdf

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6.2 DIGITAL SYSTEM COMPONENTS 297

A 0 A 1

A 0
A 1
A 2

10
10
11
11

A 2

0
1
0
1

00
00
01
01

0
1
0
1

Q 7

Q 0
Q 1
Q 2
Q 3
Q 4
Q 5
Q 6
Q 7

Q 6

00
00
01
10

Q 5

0
1
0
0

00
00
00
00

0
0
0
0

Q 4 Q 3

10
00
00
00

Q 2

0
0
0
0

00
00
00
01

0
0
1
0

Q 1 Q 0

00
00
00
00

01
10
00
00

A 2 A 1 A 0


Q 0

Q 1

Q 2

Q 3

Q 4

Q 5

Q 6

Q 7

(b)

(c)

(a)

Figure 6.2.13-to-8 decoder.(a)Block diagram.(b)Truth table.(c)Logic diagram.


next one on the right. The waveforms also reveal that the data are read into the registerserially
and appear at the output in serial form. The shift register is then known as aserial-in serial-out
(SISO) register.
PISO (parallel-in serial-out), SIPO (serial-in parallel-out), and PIPO (parallel-in parallel-
out) registers are also often used to read in the input data and read out the output data in a

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