0195136047.pdf

PROBLEMS 441

+VCC = 5 V

RB

RC = 500 Ω

Vo

DA

DB

12 kΩ

VB

VA

Figure P9.2.6

10

VA, V

t, ms

5

1562 3 4

− 5

6

VB, V

1 t, ms

− 3 2 3 4 56

Figure P9.2.7

9.2.10Considering the TTL NAND gate circuit of Figure
9.2.2, with all inputs high, show that the output will
be low.
9.2.11Consider the TTL gate circuit of Figure 9.2.2. If
VA= 0 .1V,VB = 0 .2 V, andVC = 0 .3V,
determine the approximate values ofVX,VY, and
Vo.
9.2.12A TTL NAND gate with a multiple-emitternpn
BJT (which acts as an AND gate) is shown in
Figure P9.2.12.
(a) With all inputs in the high state, show that the
outputVowill be in the low state.
(b) With at least one input, sayVA, being in the
low state, show that the outputVowill be in
the high state.
9.2.13Discuss the significance ofR 4 ,T 4 ,T 3 , and the
diode betweenT 4 andT 3 in the TTL NAND gate
circuit of Figure P9.2.12.

*9.2.14For the TTL NAND gate circuit of Figure P9.2.12,

assuming that the inputs vary between 0 and 5 V

andVCC=5 V, determine the maximum value of

RBto saturateT 2 ifiCsat= 3 .8 mA.

9.3.1Consider then-channel JFET switch shown in

Figure P9.3.1(a) with the characteristics shown in

Figure P9.3.1(b).

(a) Explain its operation.

(b) Draw the circuit of a depletion MOSFET

switch.

(c) For the input shown in Figure P9.3.1(c),

sketch the output as a function oft.

9.3.2For the JFET switch shown in Figure P9.3.1(a)

withRD =3kandVDD=12 V, sketch the

output voltage as a function oft, if the input voltage

is as shown in Figure P9.3.2(a) and the JFET

characteristics are as given in Figure P9.3.2(b).