Assembly Language for Beginners

1.14. CONDITIONAL JUMPS

|L0.12|

DCB "it is not ten",0
|L0.28|
DCB "it is ten",0

ARM64

Optimizing GCC (Linaro) 4.9 for ARM64 also uses conditional jumps:

Listing 1.128: Optimizing GCC (Linaro) 4.9

f:
cmp x0, 10
beq .L3 ; branch if equal
adrp x0, .LC1 ; "it is ten"
add x0, x0, :lo12:.LC1
ret
.L3:
adrp x0, .LC0 ; "it is not ten"
add x0, x0, :lo12:.LC0
ret
.LC0:
.string "it is ten"
.LC1:
.string "it is not ten"

That is because ARM64 does not have a simple load instruction with conditional flags, likeADRccin 32-bit
ARM mode orCMOVccin x86.

It has, however, “Conditional SELect” instruction (CSEL)[ARM Architecture Reference Manual, ARMv8, for
ARMv8-A architecture profile, (2013)p390, C5.5], but GCC 4.9 does not seem to be smart enough to use
it in such piece of code.

MIPS

Unfortunately, GCC 4.4.5 for MIPS is not very smart, either:

Listing 1.129: Optimizing GCC 4.4.5 (assembly output)

$LC0:
.ascii "it is not ten\000"
$LC1:
.ascii "it is ten\000"
f:
li $2,10 # 0xa
; compare $a0 and 10, jump if equal:
beq $4,$2,$L2
nop ; branch delay slot

; leave address of "it is not ten" string in $v0 and return:
lui $2,%hi($LC0)
j $31
addiu $2,$2,%lo($LC0)

$L2:
; leave address of "it is ten" string in $v0 and return:
lui $2,%hi($LC1)
j $31
addiu $2,$2,%lo($LC1)

Let’s rewrite it in anif/elseway